27th International ConferenceReal-Time Networks and Systems - RTNS
From 6th to 8th November 2019
RTNS 2019 is the 27th edition of the conference formerly known as RTS (Real-Time Systems, Paris). The first 12 editions of RTS were french-speaking events held in Paris in conjunction with the RTS Embedded System exhibition. Since its 13th edition, the conference language of RTNS has been English.
RTNS is a friendly and inclusive conference with a great sense of community that presents excellent opportunities for collaboration. Original unpublished papers on all aspects of real-time systems and networks are welcome. RTNS covers a wide-spectrum of topics in real-time and embedded systems, including, but not limited to:
- Real-time application design and evaluation: automotive, avionics, space, railways, telecommunications, process control, multimedia.
- Real-time aspects of emerging smart systems: cyber-physical systems and emerging applications, real-time big data, real-time edge/fog/cloud computing, smart grid systems.
- Real-time system design and analysis: real-time tasks modeling, task/message scheduling, evaluation, mixed-criticality systems, Worst-Case Execution Time (WCET) analysis, QoS, security.
- Software technologies for real-time systems: model-driven engineering, programming languages, compilers, WCET-aware compilation/parallelization, middleware, real-time OS, virtualization.
- Formal specification and verification: application of formal models, such as model checking, satisfiability modulo theories or constraint programming, to solve real-time problems.
- Real-time distributed systems: fault tolerance, time synchronization, task/messages allocation, adaptability and reconfiguration, publisher/subscriber protocols, distributed real-time database.
- Real-time networks: Networks on Chip (NoC), wired and wireless sensor and actuator networks, Time-Sensitive Networks (TSN), industrial IoT, SDN, 5G, end-to-end latency analysis.
- Hardware support for real-time systems: hardware/software co-design, power/temperature-aware techniques, design of predictable hardware, multi-core and many-core platforms, hardware accelerators, cache related issues, interconnect and memory.